A platform technology developed at National Taiwan University sets a new benchmark for contact metrology in next-generation semiconductor devices.
By National Taiwan University
NTU-developed Operando Cross-Sectional Scanning Tunneling Microscopy (Operando XSTM) enables the first direct measurement of carrier transfer length at the contact edge of operating 2D semiconductor transistors, with atomic-scale spatial resolution. Nature 655, 350–356 (2026).
©National Taiwan University
A research team at National Taiwan University (NTU), led by Distinguished Professor Ya-Ping Chiu of the Department of Physics, has pioneered an operando cross-sectional scanning tunneling microscopy and spectroscopy platform (operando XSTM/STS) — an entirely new semiconductor metrology capability that enables direct measurement of carrier injection at metal/semiconductor contact edges while a transistor is under actual device operating conditions. The study, "Directly probing the carrier transfer length in 2D-material transistors," was published in Nature on July 1, 2026.
The operando XSTM/STS technique was conceived and developed within NTU's Department of Physics, building on nearly two decades of in-house cross-sectional STM expertise. Professor Chiu's group designed and integrated an in situ biasing and gate-control system into the existing ultrahigh-vacuum platform, enabling synchronized electronic spectroscopy while the transistor operates under source-drain and gate voltages. This capability made it possible, for the first time, to directly access the local electronic structure at an operating contact edge with sub-nanometer spatial resolution.
As semiconductor devices continue to scale toward and beyond the 1 nm technology node, two-dimensional semiconductors have emerged as candidates for future logic technologies owing to their atomic-scale thickness and excellent gate electrostatics. Continued transistor scaling, however, depends not only on shortening the channel but equally on reducing the metal contact region.
The carrier transfer length — the effective spatial extent over which carriers are injected from a metal electrode into the semiconductor channel — is the fundamental length scale governing contact resistance and a direct indicator of whether a device can meet the demands of extreme scaling. Until now, this parameter in 2D transistors has been accessible only through indirect electrical extraction, contact-length scaling, or simulation, all of which rest on model assumptions that break down in 2D semiconductor systems and cannot spatially resolve carrier injection beneath the metal contact.
To overcome this limitation, the NTU team cleaved Bi-contacted monolayer MoS₂ transistors under ultrahigh-vacuum conditions, exposing a clean cross section of the metal contact, semiconductor channel, and dielectric stack directly in front of the STM probe. With source-drain and gate voltages applied simultaneously, the researchers performed line-scan tunneling spectroscopy across the contact edge, mapping shifts in the MoS₂ conduction-band edge as a function of position. Fitting an exponential decay to the band-edge profile directly yielded the carrier transfer length without invoking any model assumptions about contact or channel sheet resistance.
The measurements revealed an ultrashort carrier transfer length of approximately 2.0 nm — more than four times shorter than the 9.25 nm value obtained by transfer-length-method (TLM) extraction on the same devices, a discrepancy the team attributes to Bi-induced modulation of the underlying MoS₂ conductivity that violates the key TLM assumption of equal sheet resistance under the contact and in the open channel. The team further validated the method on HfO₂-gated MoS₂ devices, p-type PdSb/WSe₂ transistors, and silicon-on-insulator (SOI) devices, demonstrating that operando XSTM/STS is a general-purpose platform applicable across 2D and conventional semiconductor systems.
This work establishes operando XSTM/STS as the first experimental method capable of directly measuring carrier transfer length in operating transistors at sub-nanometer spatial resolution, closing a critical gap in semiconductor contact metrology that has persisted for decades.
Beyond the immediate results, the platform provides researchers and the semiconductor industry with a direct, model-free tool for benchmarking and optimizing contact engineering across material systems — enabling rigorous comparison of contact metals, dielectrics, and device architectures without reliance on indirect electrical extrapolation.
As the industry advances toward Angstrom-scale devices, the ability to spatially resolve and quantify carrier injection at the atomic scale will be indispensable for guiding contact design, identifying process-induced variability, and accelerating the validation cycle from materials development to process integration.
The work was a collaboration between National Taiwan University and groups at National University of Singapore, and National Taiwan Normal University.
Co-corresponding author Prof. Ya-Ping Chiu’s email address: ypchiu@phys.ntu.edu.tw